Page History
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Term | Description |
|---|---|
ATCA | Advanced Telecommunications Computing Architecture |
CPU | Central Processing Unit |
EPICS | Experimental Physics and Industrial Control System |
EVR | Event Receiver |
FPGA | Field Programmable Gate Array |
IOC | Input Output Controller |
RF | Radio Frequency |
SHM | Shelf Manager |
TPR | Timing Pattern Receiver |
VCO | Voltage Controlled Oscillator |
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Linac Locking - A System Level Overview
Subsystem Description
The Timing Pattern Receiver (TPR) is an application that replaced the Event Receiver (EVR) for LCLS-II and its purpose is to generate triggers to control hardware devices for control, data acquisition and other purposes. There are two main flavors this application is deployed in: (i) as a PCIe board and (ii) as an ATCA board. The IOC described here is for the former case.
IOC Description
Firmware Description
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Repository | Version |
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References
TPR Documentation
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Overview
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