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Table of Contents

To-Do List

  • eye-scans for all transceivers
  • work on high-speed-digitizer timing robustness
  • check wave8 timing robustness
  • program hsd firmware over pcie?
  • manufacture new xpm boards
  • reproduce/fix timing nodes
  • ensure that Matt's latest xpm firmware fixes the xpm link-glitch storms
  • reproduce/fix TxLinkReset workaround
  • reproduce/fix xpmmini-to-lcls2timing workaround
  • reproduce/fix link-lock failure on timing system KCUs
  • reproduce/fix timing nodes assigning wrong timestamp to configure transition by 1 or 2 buckets
    • matt thinks this is on the receiver side: some fifos that carry daq data separate from timing data.  matt thinks perhaps we have to connect the resets to those fifos.
  • manufacture new boards
    • perhaps we have to connect the resets to those fifos.
  • (perhaps done by fixing reset logic?) reproduce/fix link-lock failure on timing system KCUs
  • (done) ensure that Matt's latest xpm firmware fixes the xpm link-glitch storms
  • (perhaps done by fixing reset logic ?) reproduce/fix TxLinkReset workaround
  • (perhaps done by fixing reset logic?) reproduce/fix xpmmini-to-lcls2timing workaround
  • (done, fixed with equalizer 0x3 setting) check/fix loopback fiber problem in production xpms in room 208 
  • work on high-speed-digitizer timing robustness
  • check wave8 timing robustness
  • program hsd firmware over pcie?

Summary Of Testing

These are the results of the tests that have been conducted in the FEE alcove to determine if the XPM glitch can be reproduced.
Every test is run from a starting behavior where the DAQ can allocate, configure, run, and disable.
Whenever the DAQ does not follow the starting behavior remedies are applied to recover it.

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