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# Load FPGA hierarchy and register map from YAML files.
cpswLoadYamlFile("$(YAML_DIR)/000TopLevel.yaml", "NetIODev", "", "$(FPGA_IP)")
# Load FPGA configuration/initialization from a YAML file
cpswLoadConfigFile("$(YAML_DIR)/config/defaultsGenRTMV2.yaml", "mmio", "")
# Yaml File
epicsEnvSet("YAML_FILE", "$(YAML_DIR)/000TopLevel.yaml") |
Database loading
Load the phase locker records.
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# ===========================================
# DB LOADING
# ===========================================
dbLoadRecords("db/phaseLocker.db", "P=${PREFIX}, PORT=${PORT}")
dbLoadRecords("db/subR_phaseLocker.db", "P=${PREFIX}")
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Asyn driver configuration
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