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Start the 3 RIX ioc's like this (this example is for number 3), but see 'Brining Bringing up IOC screens' above.  Read the .cmd file to see the epics prefix for fim's 1,2,3:

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python scripts/wave8LoadFpga.py --l 5 --mcs /cds/home/c/cpo/junk/Wave8DigitizerPgp4_6Gbps-0x02020000-20211210145222-ruckman-4592987.mcs

Running the FIM/Wave8 at 1 MHz in SRCF

For initial testing in SRCF, wave8_config.py was kludged up modified to avoid the need for an IOC.  PV interactions were commented out.  Rogue interactions were added to modulate the BlowOff bit and set some register values.

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With RawBuffers.BuffLen set to 32 (samples, I'm guessing), a 1 MHz run with 0 zero deadtime succeeded.  Also Disable went through.  At 71 kHz, a BuffLen value of 255 is fine for deadtime-less running.

Deadtime Issues

In the latest wave8 front-end-board firmware (2.4.x) there is a new DataPathCtrl register.  This has two bits that enable deadtime to the XPM.  It looks like it currently defaults to 0x3 (both controls and daq data paths can assert deadtime) and we think it should be set to 0x2 (only daq pth path can assert deadtime).  We believe the controls-side will drop in units of “entire events” so 0x2 should be fine for controls.

If deadtime issues persist, bring up the IOC screens and verify that the trigger is set up correctly.  Large TrEvent:TriggerDelay (TriggerDelay in the Acquisition Settings panel) settings cause deadtime, but values < ~1000 are fine.

RIX Mono Encoder

See Chris Ford's page here:  UDP Encoder Interface (rix Mono Encoder)

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