Page History
...
| Anchor | ||||
|---|---|---|---|---|
|
ASIC Power Requirement | Analog Section | Digital Section | I/O Section | 0.6V Sink | Analog TPS | |||||
|---|---|---|---|---|---|---|---|---|---|---|
ePixUHR 140k 2x2 Detector | SparkPix-S 500k 2x2 Detector | ePixUHR 140k 2x2 Detector | SparkPix-S 500k 2x2 Detector | ePixUHR 140k 2x2 Detector | SparkPix-S 500k 2x2 Detector | ePixUHR 140k 2x2 Detector | SparkPix-S 500k 2x2 Detector | ePixUHR 140k 2x2 Detector | SparkPix-S 500k 2x2 Detector | |
Voltage | 1.3 V | 1.3V | 1.3V | 1.3V | 1.3V | 1.3V | ??? Maybe | 0.6 V | 2.5 V | 2.5V |
Required current | 10A (= 2.5 A* 4 ASIC) | 13.4 A (= 3.35A * 4 ASIC) | - | |||||||
Old digital design: |
0.3 A * 4 ASIC) |
New digital design ???? | - |
Old digital design |
0.5 A * 4 ASIC) |
New digital design ???? | 1.6 A [1RX, 8TX, 8serializer and 2cm clkspine : ~ 317mA] | ??? (If existing lower or equal than SparkPixS) | -8 A | 0.4 A (=0.1 * 4 ASIC) | ||
0.4 A
(=0.1 * 4)System Requirement | +1.3 V @ +17.5 A (Adding +30% current | |
|---|---|---|
for PVT variation) | +1.3 V @ +3 A (Adding +30% current |
for PVT variation) [waiting for the |
new digital design] | +1.3 V @ +2.5 A (Adding +30% current for PVT variation) | +0.6 V @ -11 A !this current is not provided by the LDO. But it passes through it. (Adding +30% current |
for PVT variation) |
+2.5 V @ +0.5 A (Adding +30% current |
for PVT variation) |
...
FPGA Selection
ePixUHR 140k 2x2 Detector Specs | ePixUHR 1.1M 6x6 Detector Specs | ePixUHR 1M 6x5 Detector Specs | SparkPix-S 500k 2x2 Detector Specs | SparkPix-S 2M 4x4 Detector Specs | KU15P (-A1760) Kintex Ultrascale+ | KU15P (-A1156) Kintex Ultrascale+ FPGA USED IN ePixHR250M | KU15P (-E1517) Kintex Ultrascale+ | XCVU160 (-C2104) Virtex Ultrascale | XCVU190 (-A2577) Virtex Ultrascale | VU13P (-A2577) Virtex Ultrascale+ | |
|---|---|---|---|---|---|---|---|---|---|---|---|
General IO (HD, HP) | 96 HD, 416 HP | 48 HD, 486 HP | 96 HD, 416 HP | 52 HD, 364 HP | 0 HD, 448 HP | 0 HD, 448 HP | |||||
High Speed GTs (GTH/GTY) | - ASIC data: 32 = 8 lanes * 4 ASIC - Spare outputs : 4 - PGP communication: 12 = 12* 160 Gbps/ 275Gbps (1 Amphenol Transceiver) Total: 48 High Speed GTs | - ASIC data: 288 = 8 lanes * 36 ASIC - Spare outputs : 0 - PGP communication: 72 = 12* 1.44 Tbps/ 275Gbps (6 Amphenol Transceivers) Total: 360 High Speed GTs | - ASIC data: 240 = 8 lanes * 30 ASIC - Spare outputs : 0 - PGP communication: 72 = 12 lanes * 1.19 Tbps/ 275Gbps (6 Amphenol Transceivers) Suggested 3 transceivers 1.4x compression in the detector Total: 312 High Speed GTs (If considering 5x2 Modules, 104 GTs each) | - ASIC data: 32 = 8 lanes * 4 ASIC - Spare outputs : 4 - PGP communication: 12 = 12* 160 Gbps/ 275Gbps (1 Amphenol Transceivers) Total: 48 High Speed GTs | - ASIC data: 128 = 8 lanes * 16 ASIC - Spare outputs : 0 - PGP communication: 24* = 12* 495 Gbps/ 275Gbps (2 Amphenol Transceivers) Total: 152 High Speed GTs | 76 (44 GTH/32 GTY) | 28 | 56 (32 GTH/24 GTY) | 104 (52 GTH/52 GTY) | 120 (60 GTH/60 GTY) | 128 (0 GTH/128 GTY) |
Total Block RAM | 34.6 Mb | 34.6 Mb | 34.6 Mb | 115.2 Mb | 132.9 Mb | 94.5 Mb | |||||
UltraRam, HBM | 36 Mb, None | 36 Mb, None | 36 Mb, None | None, None | None, None | 360 Mb, None | |||||
Transceiver Speed (GTH, GTY) | > 10 Gbps | > 10 Gbps | > 10 Gbps | > 10 Gbps | > 10 Gbps | GTH 16.3 Gb/s GTY 32.75 Gb/s Transceivers | GTH 16.3 Gb/s GTY 16.3 Gb/s Transceivers | GTH 16.3 Gb/s GTY 32.75 Gb/s Transceivers | GTH 16.3 Gb/s GTY 30.5 Gb/s Transceivers | GTH 16.3 Gb/s GTY 30.5 Gb/s Transceivers | GTY 32.75 Gb/s Transceivers |
Size | The PCB width is (preferably) 65 mm (2.56’’) | 42.5 x 42.5 mm | 35 x 35 mm | 40 x 40 mm | 47.5x47.5 mm | 52.5 x 52.5 mm | 52.5 x 52.5 mm | ||||
Cost | 6-10 k$ | 5-9 k$ | 6-10k$ | 40 k$ | 50-70 k$ | 60-110 k$ | |||||
Comments | This is fine for the 2x2 Systems. This is fine for the SparkPix-S 4x4 | The number of GTs in this FPGA does not fit any of the cameras we are targetting | This is fine for the 2x2 Systems. For the larger systems we need more than 3 FPGAs | This is fine for the 2x2 Systems. | This is fine for the 2x2 Systems (assuming we can fit the real estate). | This is fine for the 2x2 Systems.(assuming we can fit the real estate) |
...
Overview
Content Tools