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RequirementePixUHRSparkPix-SSparkPix-ED (question)
frame rate100kfps1Mfps1Mfps
Power supplies

2.5V Analog

1.3V (AS/DS/IO)

2.5V Analog

1.3V (AS/DS/IO)

0.6V (Current sink!)

1.2V (AS/DS/IO)
Power for each supplyePixUHR - 35 kHzSparkPix-S: supply/ground and power consumptiont.b.d.
Number of GT IOs per ASIC

8 (outputs)
1 clock in

8 (outputs)
1 clock in
t.b.d
Expected I/O speed5.25 Gb/s5.25 Gb/s10 Gb/s (question)

Total data bandwidth

42 Gbit/s38 Gbit/s(question)





FPGA Selection


Target (2x2 Detector)

2MPix (sparkPix-s)

Target (6x6 Detector: 1 Mpx)

XCVU160 (-C2104)

Virtex

Ultrascale

KU15P (-A1760)

Kintex Ultrascale+

VU13P (-A2577)

VirtexUltrascale+

IO (HD I/O, HP I/O)




52, 364

96, 416

448 (HP)

IO (GTH )

≥ 36 (32 outputs + 4 spares)


288

52

44

0

IO (GTY)

≥ 12 (Transceivers PGP)


60(72 for 6 transceivers)

52

32

128

UltraRam, HBM





36 Mb, None

360 Mb, None

Transceiver Speed (GTH, GTY)

> 10 Gbps



GTH 16.3Gb/s

GTY 30.5Gb/s

Transceivers

GTH 16.3Gb/s

GTY 32.75Gb/s

Transceivers

GTY 32.75Gb/s

Transceivers

Size

The PCB width is (preferably) 65 mm (2.56’’)



47.5x47.5 mm

42.5 x 42.5 mm

52.5 x 52.5 mm

Cost




40 k$

6-10 k$

60-110 k$

Communication

> 42 Gbps






System level

RequirementParameters

Power supply24V consistent with the HR detector

Mechanical size

We would like to match the ePixHRM board dimensions to reuse cooling

Side entrance detector

  • Existing 75x175mmx58:
  • max envelope would be (100x175x75mm)


Digital board2.56x5.265"

Power and communication2.56x5.240"

Carrier

2.56x1.95


Can we do it smaller?

What is the minimum amount of components that need to leave in this board











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