Page History

...

• Meeting on Thursday with higer-ups
• We should use Teams for working with RadioBeam/other groups
• Need to get an understanding of how the firmware should function + division of work
  
  • L. Doolittle typically does specialized, non-modular code (used in LCLS II) which can be hard to port over/understand.
  • Can we have Chao/Larry do the firmware and have LCLS-RadioBeam define requirements/review our code
    • Could also have them do some software tasks: Pentalinux P4P  + efuse reading/writing for ultrascale+ platform
  • Chao thinks Kukhee's code might be a good basis given a proper set of requirements
• Larry's slides on Phase 1.5 HW Block
  • 
  • 2Channels in, 1 Channel out Baluns
  • ADCs to run at 2.4576 GS/s
  • 12VDC power
  • FMC Digital I/O requirements:
    • Digital trigger output for SSA (1 channel, 0V - 3.3V).
    • Will need modulator (2 channel), interlock (x channel), and debug (1 channel) output triggers in the future (not sure on specifications, discuss RadioBeam).
    • Digital inputs TBD with RadioBeam
• Chao's LLRF Data Converter Characterization
  
  • Trying to reocver/understand Dan's previous work
  • Evaluation tool is limited to running 1.6us samples meaning stability is too low (want ~5us)
  • Test: Signals from RFSOC loaded to DAC and looped back to ADCs. ADC output processed in Matlab (excludes op-amp downcoverter)
    
    • 
    • (Bo) Could do an FFT to check there's anything extra going on
  • Next test to include up/down converters
• Chao's RFSoC SOM Purchase Proposal
  
  • XRF16: 26 weeks, $30k/SOM + $6k/carrier. Will want 6x each ($216k)
• Ryan+Stephen: Budget plan is incomplete and Schedule is on existent
• We need a charge number for work on this project

...