Page History

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• Freeze buffer (SW Freeze Buffer): If enabled, freezes all enabled circular buffers in firmware, hence all new data is discarded in firmware and software does not see new data
• Trigger count: Counts valid data acquisition triggers. 
• Arm hardware trigger (Arm HW Trigger): Arm the trigger and wait for a trigger signal to arrive. Frame acquisition starts after trigger arrival and trigger is dis-armed
• Cascaded Trigger (Cascade Trigger enable) : Enable / Disable cascaded trigger between DaqMux module
• Auto re-arm (Auto Rearm HW Trigger): In trigger mode, once the acquisition finished, a new trigger will start a new acquisition automatically
• Daq Mode (DAQ Mode): Chose the acquisition mode (Continuous or Trigger mode)
• Packet Header (Packet Header Enable): Enable a 14-byte header containing information and a snapshot of the DaqMux configurations that is prepended to the acquired frame
• Hardware Freeze (HW Freeze Buffer Enable): Enable the use of the hardware freeze buffer input signal of the DaqMux
• Decimation rate divisor: Defines new down sampled rate
• Buffer size (Data Buffer Size) : Number of 32-bit words to be acquired including header if enabled
• Debug Input Valid : All DaqMux AXI input streams valid signals concatenated together (Debug)
• Debug link Ready: All DaqMux AXI input streams ready signals concatenated together (Debug)
• Time stamp (Timestamp[31:0] and Timestamp[63:32]) : The time stamp read from the timing core upon at trigger formatted in nano seconds (left) and seconds (right)

The Stream settings tab on the other hand contains channel specific settings, and are described as follows:

• TBD

DaqMux register & PV description

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