Page History

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• HeaderWord[0]: dmod(31:0)  - Timing pattern information
• HeaderWord[1]: dmod(63:32)  - Timing pattern information 
• HeaderWord[2]: dmod(95:64) - Timing pattern information 
• HeaderWord[3]:  dmoddmod(127:96) - Timing pattern information 
• HeaderWord[4]: dmod(159:128)  - Timing pattern information 
• HeaderWord[5]: dmod(191:160)  - Timing pattern information 
• HeaderWord[6]: timeStamp_i(31:0)   –  secPastEpoch
• HeaderWord[7]: timeStamp_i(63:32)  –  nses 
• HeaderWord[8]: bsa(127:96) - edefAvgDn
• HeaderWord[9]: bsa(95:64) -edefMinor
• HeaderWord[10]: bsa(63:32) -edefMajor
• HeaderWord[11]: bsa(31:0) -edefInit
• HeaderWord[12]: packetSize_i
• HeaderWord[13]: Firmware specific signals
  
  • [BIT31:BIT27] = "00000"
  • [BIT26:BIT26] = Trigger Header: Hardware Trigger – s_trigHw
  • [BIT25:BIT25] = Trigger Header: Cascaded Trigger – s_trigCascRe
  • [BIT24:BIT24] = Trigger Header: Software Trigger – s_trigSw
  • [BIT23:BIT23] = Data format – dec16or32_i
  • [BIT22:BIT22] = Enable decimation averaging – averaging_i
  • [BIT21:BIT21] = Test mode – test_i
  • [BIT20:BIT20] = AMC BAY Index – BAY_INDEX_G
  • [BIT19:BIT16] = Channel Index – axiNum_i
  • [BIT15:BIT00] = decimation rate divide – rateDiv_i

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The DaqMux streams are routed to the DRAM on the application board, and are read using another series of components and is read by exported to the software using the cpswDebugStreamAsynDriverConfigure IOC shell command, which is out of the scope of this document. This module provides all stream information in format of PVs. The available exported PVs are shown in Table 3. As can be seen, this module exports the streams represented with STR (and no longer with DAQMUX). Usually the software engineer would keep the numbering the same and just changing the string to minimize confusion.

Other references

• DaqMux original requirements

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