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This manual serves as an end-user manual to be able to configure and use the DaqMux in software.

Introduction

The DaqMux component of the FPGA in the application board of the ATCA allows the user to choose to stream up to four streams to the software (IOC) of the input streams routed to the DaqMux. All ATCA projects are configured with two DaqMuxes, one associated with each AMC daughter board. Each DaqMux has 20 streams routed to its input. The DaqMux also allows not only continuous (continuous mode) streaming of multiplexed streams, but also it allows that a fixed size of the stream is burst upon a reception of a trigger (trigger mode).

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Source	Description
Test
Disable
ADC${ADC#} FP
DAC${DAC#} FP
DBG${DBG#} FP
RF IN ${RF_#} : ADC${ADC#} FP
RF OUT MON : ADC${ADC#} FP
DC IN ${DC#}

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Crossing YAML/PVs/DaqMux original's requirements

The Register/PV mapping can be seen in the following table. Registers with a blank PV name are not exported to EPICS.

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Register name	Address	Access	Bits	PV Name ( postfix only # indicate mux# )	Sub-name	Description
Control	0x0	RW	0		Software Trigger Enable	Triggers DAQ on all enabled channels
			1	DAQMUX#_CSCDTRG	Cascade Sw Trigger mask	Mask for enabling/disabling cascaded trigger '0' - Disabled (Cascaded Sw Trigger ignored) '1' - Enabled
			2	DAQMUX#_AUTOREARM	Auto Rearm Hw Trigger	Mask for enabling/disabling hardware trigger. If disabled it has to be rearmed by ArmHwTrigger. '0' - Disabled (has to be armed with bit3 otherwise disabled) '1' - Enabled
			3	DAQMUX#_ARMHWTRG	Arm HW Trigger	Arms the hardware trigger on rising edge. After trigger occurs the trigger has to be rearmed.
			4	DAQMUX#_CLRTRGST	Trigger Clear Status	Trigger status will be cleared (On the rising edge).
			5	DAQMUX#_DAQMODE	DAQ Mode	Select the data acquisition mode '0' - Trigger mode - Normal DAQ mode. Has to be triggered to start (Other reqs. to start: Enabled, dataValid, tReady, pause). Stream stops if Error occurs. '1' - Continuous mode- The data is framed and continuously streamed out after enabled. Has to be triggered to start (Other reqs. to start: Enabled, dataValid, tReady, pause). Disable the stream to stop. Freeze buffers inserts flag into the tUser bit at tLast Stream stops if Error occurs.
			6	DAQMUX#_PACKETHEADER	Packet Header Enable	Add 128-bit header (otherwise data will be inserted)(Applies only to Triggered mode) '0' - Disabled '1' - Enabled
			7	DAQMUX#_FRZBUF	Sw Freeze Buffer	Freezes all enabled circular buffers
			8	DAQMUX#_HWFRZ	Hw Freeze Buffer Mask	Mask for enabling/disabling hardware freeze buffer request '0' - Disabled '1' - Enabled
Status	0x1	RO	0		Software Trigger Status	Software Trigger Status (Registered on first trigger until cleared by Trigger Clear Status - Control[4] ).
			1		Cascade Trigger Status	Cascade Trigger Status (Registered on first trigger until cleared by Trigger Clear Status - Control[4] )
			2		HW Trigger Status	Hardware Trigger Status (Registered on first trigger until cleared by Trigger Clear Status - Control[4] )
			3		HW Trigger Armed Status	Hardware Trigger Armed Status (Registered on rising edge Arm HW Trigger - Control[3] - and cleared when hardware trigger occurs )
			4		Combined Trigger Status	Combined Trigger Status (Registered when trigger condition is met until cleared by Trigger Clear Status - Control[4] )
			5		Freeze Buffers Status	Freeze buffer occurred (Registered on first freeze until cleared by Trigger Clear Status - Control[4] )
Decimation	0x2	RW	15:0	DAQMUX#_DECRATEDIV	Decimation Rate Divider	Sample rate divider (Decimator): Averaging Enabled: (powers of two) 1,2,4,8,16,etc (max 2^12) Averaging Disabled (32-bit): 1,2,3,4,etc (max 2^16-1). Averaging Disabled (16-bit): 1,2,4,6,8,etc (max 2^16-1).
DataSize	0x3	RW		DAQMUX#_BUFFSIZE	Data Buffer Size	Number of 32-bit words (if enabled header will be included in the first 14 words of data). Minimum size is 14 (the size of the header).
TimeStamp	0x4	RO	31:0	DAQMUX0_TS_NSEC	Timestamp[31:0]	Timestamp [31:0] - secPastEpoch
TimeStamp	0x5	RO	31:0	DAQMUX0_TS_SEC	Timestamp[63:32]	Timestamp [63:32] - nsec
BSA	0x6	RO	31:0		bsa(0)	edefAvgDn
	0x7		31:0		bsa(1)	edefMinor
	0x8		31:0		bsa(2)	edefMajor
	0x9		31:0		bsa(3)	edefInit
TrigCount	0xA	RO	31:0	DAQMUX#_TRGCNT	Trigger Count	Counts valid data acquisition triggers.
DbgInputValid	0xB	RO	31:0	DAQMUX#_DBGINPVALID	Debug Input Valid Bus	Input Valid bus for debugging
DbgLinkReady	0xC	RO	31:0	DAQMUX#_DBGLNKRDY	Debug Link Ready	Input LinkReady bus for debugging
InputMuxSel	0x10	RW	4:0	DAQMUX#_INPMUXSELSTR0 DAQMUX#_INPMUXSEL0	Input Mux Select[0]	0x1x: Stream x: Channel select Multiplexer 0 - Disabled, 1 - Test, 2 - Ch0, 3 - Ch1, 4 - Ch2 etc.(up to Ch29) Test mode will output counter data
	0x11		4:0	DAQMUX#_INPMUXSELSTR1 DAQMUX#_INPMUXSEL1	Input Mux Select[1]
	0x12		4:0	DAQMUX#_INPMUXSELSTR2 DAQMUX#_INPMUXSEL2	Input Mux Select[2]
	0x13		4:0	DAQMUX#_INPMUXSELSTR3 DAQMUX#_INPMUXSEL3	Input Mux Select[3]
	0x14-0x1F			-	Not used
DaqStatus	0x20-0x23	RO	0	DAQMUX#_STRMPAUSE(0-3)	Stream Pause	Raw diagnostic stream control Pause
			1	DAQMUX#_STRMRDY(0-3)	Stream Ready	Raw diagnostic stream control Ready
			2	DAQMUX#_STRMOVF(0-3)	Stream Overflow	Raw diagnostic stream control Overflow
			3	DAQMUX#_STRMERR(0-3)	Stream Error	Error during last Acquisition (Raw diagnostic stream control Ready or incoming data valid dropped)
			4	DAQMUX#_INPDATAVALID(0-3)	Input Data valid	The incoming data is Valid (Usually connected to JESD valid signal).
			5	DAQMUX#_STRMENABLED(0-3)	Stream Enable	Output stream enabled.
			31:6	DAQMUX#_FRAMECNT(0-3)	Frame Count	Number of 4096 byte frames sent
	024-0x2F				Not used
DataFormat	0x30-0x33	RW	4:0	DAQMUX#_FORMATSIGNWIDTH(0-3)	Format Sign Width	Indicating sign extension point
			5	DAQMUX0_FORMATDATAWIDTH(0-3)	Format Data Width	Data width 32-bit or 16-bit '0' : 32-bits '1' : 16-bits
			6	DAQMUX#_FORMATSIGN(0-3)	Format Sign	Signed/unsigned '0' : Unsigned '1' : Signed
			7	DAQMUX#_DECIMATION(0-3)	Decimation Averaging	Decimation Averaging '0' : Disable '1' : Enable
				DAQMUX#_TRGDAQ		A sequence setting Software Trigger Enable to 1 then 0

Legend:

	Not in original requirements document
	Not exported to EPICS

Sequence PVs

EM1K0:GMD:HPS:DAQMUX0_TRGDAQ. Sets TriggerSw to 1 then 0.

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Table of contents

Introduction

Crossing YAML/PVs/DaqMux original's requirements