Page History
...
- Targeted for ASIC register communication and timing/trigger synchronization
- point-to-point or daisy chain communication
- Support up to 15 devices in a daisy chain
- Serial Encoding: 8B10B
- DC balanced
- Targeting FPGA/ASIC communication to over fiber optic or long copper cables
- Serial Rate: Same as reference clock sent to ASIC
- Supports fixed latency communication
- Register access:
- Only supports 32-bit aligned addresses and 32-bit word single (non-burst) transactions
...
Overview
Content Tools