Page History

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• Targeted for ASIC register communication and timing/trigger synchronization
• point-to-point or daisy chain communication
  • Support up to 15 devices in a daisy chain
• Serial Encoding: 8B10B
  • DC balanced
  • Targeting FPGA/ASIC communication to over fiber optic or long copper cables
• Serial Rate: Same as reference clock sent to ASIC
• Supports fixed latency communication
• Register access
  • Only supports 32-bit aligned addresses and 32-bit word single (non-burst) transactions

Control Codes

The IDLE code is sent when no data frame and no trigger code is being sent.   The GR is used to send a "global reset" to all the ASIC digital logic. Both IDLE and GR are "comma" codes such that the RX alignment gearbox can align to either of these codes (e.g. power up and start up the ASIC with only setting GR codes for a long period of time).

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