Page History

...

The FPGA sends request messages to the ASIC in the serial protocol data payload tranport (in-between SOF and EOF). The ASIC processes the message and responds back to the FPGA.  Only 1 message is in flight at any time to remove the requirement of back pressuring the link.   Both the request message and responds message are the same size (10 bytes).

The daisy chaining of multiple ASIC is achieved via the header's device address field.  When the ASIC received the header and the device field is 0x1, then the ASIC will process the register request message else pass it through.  For each daisy chain stage and when device address is non-zero, the TX device address field is decremented by 1 from the RX device address.  Example: You have two ASICs in the daisy chain.  You would use device address = 0x1 to do register access on the first device and device address = 0x2 to do register access on the seconds device.

ASIC Inbound (FPGA Outbound) Request Format

...