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To compile debug code one has to put "dbg" at end of SIT_ARCH: export SIT_ARCH=x86_64-rhel7-gcc48-dbg.  Remember to set LD_PRELOAD above to point to the dbg area (instead of opt) as well.

This variable is used in in https:/reg/g/psdm/sw/releases/ana-current/SConsToolsgithub.com/lcls-psana/SConsTools/blob/master/src/tools/psdm_cplusplus.py