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took out the resets in Digitizer.cc and didn't see any failures on the configure transition in about 40 tries, but did see one hsd (1A:A) get dead time with headercntof=2 which wasn't cleared until I put the resets back in Digitizer.cc?

UNSOLVED: Disable phase 2 failed in these log files: /reg/neh/home/cpo/2020/07/13_19:30:*drp*.log.  Added a print statement in PGPDetector.cc to explicitly print out if disable phase 2 received by segment level.  Maybe disable phase 2 conflicts with l1accept?

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Tried running hsd134PVs with the "-E" option (ignore errors, so it would retry?) but still see failures /reg/neh/home/cpo/2020/07/02_18:27:00_daq-tst-dev07:hsdioc_89.log and /reg/neh/home/cpo/2020/07/02_18:27:00_daq-tst-dev07:hsdioc_1a.log.  Wasn't able to follow all the "-E" logic yet.  Maybe  Feels like "-E" doesn't retry?

SOLVED: Running at 10Hz with no recording phase2 of disable not be seen by any hsds: /reg/neh/home/cpo/2020/06/16_15:26:24_drp-tst-acc06:control.log.  can see control.py try to write xpm pv's for disable phase 2.  Saw this again here when recording at 100Hz:  /reg/neh/home/cpo/2020/06/18_15:37:36_drp-tst-acc06:control.log.  Seemed not so reproducible at 10Hz, but reproducible at 100Hz.  Saw it with slow update disabled here: /reg/neh/home/cpo/2020/06/18_18:33:51_daq-tst-dev03.pcdsn:control_gui.log.  hsd logs show phase1 of disable but not phase2.  also saw this without recording here: /reg/neh/home/cpo/2020/06/18_18:51:48_drp-tst-acc06:control.log.  Following suggestions from Ric eventually traced this down to an os.system('cat /proc/datadev_*') line in hsd_config.py:hsd_config().  I don't understand why that triggered this issue.

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