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- Should not mock-up an axi-write every time we receive the right event-code
- Currently the SWControlEn/SWControlValue are direct axi writes to front-end board
- Will need to change front-end board firmware
- TxControl in KCU1500 has 8-bit field and valid that needs to be set to communicate to front end board. Will map this to CC in front-end board.
- TxControl goes through Pgp2bAxi module.
- Can control these registers both with software (for debugging) or hardware.
Tracking Down Timing Fiber Input
- pgplanewrapper.vhd has this code:
evrRxP(1) <= qsfp1RxP(3);
evrRxN(1) <= qsfp1RxN(3);evrRxP(0) <= qsfp1RxP(2);
evrRxN(0) <= qsfp1RxN(2);
- not sure why 2 EVRs (maybe lcls1 and lcls2?)
- other 6 lanes are all hooked up to PGP
- pgplanewrapper also hooks up the 6 dmaObMasters/dmaIbMasters etc to the pgp lanes (last two are unused, because they are used by evr)
- timetoolkcu1500.vhd hooks dmaIbMasters(0) to the AxiStreamTap, so our camera data is on qsfp0[0], which is the first of the 6 pgp lanes
- timing fibers are on the last two fibers of qsfp1
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