Page History

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axi-stream: amba-xilinx-interconnect: no address involved, like a port, push/acknowledge
axi: full memory interface: address/values and can burst multiple values
axi-lite: used for register interfaces: 32-bit value with address

What we learned about timing stream:

eventcode is part of TimingStreamType
timingstreamrx (timing message) and timingrx (timing message) have outputs of type timingstream
timingrx instantiates both
lcls1 is timingstreamrx
lcls2 is the timingframerx
timing core instantiates timingrx

TimingCore outputs TimingBusType and TimingStreamType is a member of this and has the eventcodes.

timingcore is instantiated by EvrFrontEnd

EvrFrontEnd is instantiated by Hardware.  Hardware has TimingBusType as a local variable.  This is the highest it gets.

Hardware is instantiated by the TimeToolKcu1500

To do:

see where the image comes from