Page History

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• Page 46:
  
  • "The FM2000 series devices support those two methods. The first method is supported by setting the PCS_CFG_1[DE] to 0. The second method is is supported by setting the PCS_CFG_1[DE] to 1."
• Page 76:
  • "Differences with FM2000 family:
    • The FM2XXX samples write data on the same cycle as CS, AS, ADDR and RW_N. Because of that, CS and AS had to be delayed on multiplex buses by one cycle to allow ADDR to be latched and DATA to be driven on the bus. This is addressed in FocalPoint by sampling data on the next clock edge allowing CS and AS to be driven along with the address cycle.
    • The FM2XXX waits for CS to fully deassert for one cycle before starting a new cycle. This restriction has been removed.
    • FocalPoint is designed to be clocked at up to 133MHZ versus 66MHZ for the FM2000 family
      
    • The combination of those 3 modifications could allow the system designer to quadruple the throughput on the CPU bus."
• Page 151:
  • "Binning of the selected hash value is performed using division for ECMP and modulo for link aggregation. Division (also known as Hash Threshold) has the advantage of providing better stability of the bin mappings when the number of bins is changed ( cf RFC 2992). This property is only important for ECMP however, so in the interest of maintaining backwards compatibility with FM2000 devices, link aggregation continues to employ modulo binning. Both functions provide equally balanced hash binning."
• Page 156:
  • "Note: The EtherType included in the hash is the layer 2 header's first non-VLAN EtherType. In constrast, Tahoe (FM2000) includes the first EtherType in its frame hashing. Thus, if backwards compatibility with Tahoe is required, UseType should be set to zero."
• Page 156:
  • "10.4 Tahoe (FM2000) Compatibility
    

    • Multi-chip systems using both Tahoe and Bali devices may, depending on the hardware learning configuration,
      require consistent frame hashing across the two generations of switches. For example, in a fat tree with
      learning enabled in the spine chips, it is important that (a) the hash function be symmetric and (b) all edge
      switches use the same hash function. The following table summarizes the configuration requirements that
      are necessary in order to achieve consistent hashing between Bali and Tahoe devices.
      Table 25: Summary of Hash Configuration Requirements for Tahoe Compatibility"

      Bali Requirement	Tahoe Requirement	Motivation
      TahoeCompatible == 1 UseSMAC == 0, UseDMAC == 0	-	Select Tahoe Compatibility mode.
      UseType == 0	IncludeTypeAndSource == 0	See note above about differences between Bali & Tahoe in their handling of EtherType.

• Page 351: