Current as of 2015-02-11

Front End Board Map

FEB Number	FEB Position	FEB S/N	FEB Device DNA	Data Flange	Control Cable	Control Link	Data Cable
9	L1T	1	0x14084072beb01c00	3	D	9	H
2	L1B	7	0x24d04072beb01c00	3	D	2	H
6	L2-3T	14	0x42084072beb01400	2	C	11*	G
0	L2-3B	6	0x02d04072beb01c00	2	C	0	G
5	L4T	5	0x58d04072beb01400	2	C	5	G
1	L4B	15	0x72814100a1b01c00	1	B	1	F
8	L5T	11	0x52814100a1b01c00	0	A	8	E
4	L5B	12	0x1c084072beb01400	1	B	4	F
7	L6T	13	0x50814100a1b01c00	0	A	7	E
3	L6B	4	0x70d04072beb01c00	1	B	3	F

*Note: The control link of Layer 2-3B top (11) is mapped to FebFpga 6.

Hybrid Map

Feb FEB Position	FEB Number	Hybrid	DataDpm	DataDpm Path	Data Cable
1t	9	0	10	2	H
	9	1	10	1	H
	9	2	10	0	H
	9	3	9	2	H
2-3t	6	0	8	0	G
	6	1	7	2	G
	6	2	7	1	G
	6	3	7	0	G
4t	5	0	5	0	G
	5	1	4	2	G
	5	2	4	1	G
	5	3	4	0	G
5t	8	0	1	0	E
	8	1	0	2	E
	8	2	0	1	E
	8	3	0	0	E
6t	7	0	2	1	E
	7	1	2	0	E
	7	2	1	2	E
	7	3	1	1	E
1b	2	0	12	0	H
	2	1	11	2	H
	2	2	11	1	H
	2	3	11	0	H
2-3b	0	0	12	3	G
	0	1	10	3	G
	0	2	8	3	G
	0	3	13	2	G
4b	1	0	13	1	F
	1	1	13	0	F
	1	2	12	2	F
	1	3	12	1	F
5b	4	0	6	1	F
	4	1	6	0	F
	4	2	5	2	F
	4	3	5	1	F
6b	3	0	5	3	F
	3	1	3	3	F
	3	2	1	3	F
	3	3	6	2	F